Hirokazu Yonezawa

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Apparatus and method for calculating temporal deterioration...

Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Timing
Reexamination Certificate

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Apparatus and method for extracting circuit, system and...

Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation
Reexamination Certificate

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Apparatus and method of LSI timing degradation simulation

Patent

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Apparatus for statistical LSI delay simulation

Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Timing
Reexamination Certificate

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Hot carrier effect simulation for integrated circuits

Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Timing
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Profile ID: LFUS-PAI-P-983102

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