Hirohisa Machida

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Adaptive equalizer and designing method thereof

Pulse or digital communications – Equalizers – Automatic
Reexamination Certificate

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Address translator having a high speed data comparator

Static information storage and retrieval – Magnetic bubbles – Guide structure
Patent

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Arithmetic and logic unit with prior state dependent logic opera

Boots – shoes – and leggings
Patent

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Associative memory circuit and TLB circuit

Boots – shoes – and leggings
Patent

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Associative memory system for performing hit judgment on cache d

Boots – shoes – and leggings
Patent

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Profile ID: LFUS-PAI-P-522884

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