Arithmetic and logic unit with prior state dependent logic opera

Details Arithmetic and logic unit with prior state dependent logic opera Arithmetic and logic unit with prior state dependent logic opera

1987-04-27

1989-04-11

Malzahn, David H.

Boots, shoes, and leggings

G06F 738

Patent

active

048212253

ABSTRACT:
The present invention is an arithmetic and logic unit of a microprocessor having hardware improved to execute specified operation such as operation of MAD (modified addition) by a small number of instruction steps.
The arithmetic and logic unit of the present invention has a control portion provided with a control circuit for performing the specified operation such as operation of MAD by a small number of instruction steps.

REFERENCES:
patent: 3278733 (1966-10-01), Kowalski
patent: 3976866 (1976-08-01), Motegi et al.
patent: 4323981 (1982-04-01), Nakamura
patent: 4460970 (1984-07-01), McClary
patent: 4589087 (1986-05-01), Auslander et al.
patent: 4592005 (1986-05-01), Kregness
patent: 4608660 (1986-08-01), Hasebe
Digital Logic and Computer Design, by M. Morris Mano, Prentice Hall, Inc., Englewood Cliffs, N.J. 07632, 1979.

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