Address translator having a high speed data comparator

Static information storage and retrieval – Magnetic bubbles – Guide structure

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365 49, 3401462, G06F 1210, G11C 1500

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active

053865286

ABSTRACT:
An address translator has an improved data comparison circuit for comparing two pieces of data having n bits, e.g., 12 bits. In the data comparison circuit, cell circuits compare two pieces of data for every corresponding 4 bits. When a match is detected in the comparison of a set of 4 bits, a signal representative of the comparison result of the lower-order bits is bypassed. Hence, delay of signal propagation which may occur in the cell circuit in which the match is detected is reduced.

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