4. Active solid-state devices (e.g., transistors, solid-state diode
  5. Lead frame

Hem P. Takiar

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Bonding pad interconnection structure

Electricity: electrical systems and devices – Miscellaneous
Patent

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Chip scale package and method for manufacture thereof

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate

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Chip scale package and method for manufacture thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Ball or nail head type contact – lead – or bond
Patent

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Chip scale package with compliant leads

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means
Reexamination Certificate

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Chip scale package with compliant leads

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Having air-gap dielectric
Reexamination Certificate

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Profile ID: LFUS-PAI-P-491049

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