4. Static information storage and retrieval
  5. Read/write circuit
  6. Testing

Garrett S. Koch

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Apparatus and method for real time data error capture and compre

Excavating
Patent

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BIST tester for multiple memories

Static information storage and retrieval – Read/write circuit – Testing
Patent

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Dram CAM cell with hidden refresh

Static information storage and retrieval – Associative memories – Ferroelectric cell
Reexamination Certificate

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Memory array built-in self test circuit for testing multi-port m

Excavating
Patent

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Memory device with data line steering and bitline redundancy

Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment
Reexamination Certificate

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Profile ID: LFUS-PAI-P-142194

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