4. Electronic digital logic circuitry
  5. Clocking or synchronizing of logic stages or gates
  6. Field-effect transistor

Eugene James Nosowicz

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Low power data storage element with enhanced noise margin

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor
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Method and apparatus for implementing fault tolerant phase...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing
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Method and latch circuit for implementing enhanced...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Set/reset latch with minimum single event upset

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Particular stable state circuit
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Set/reset latch with minimum single event upset

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Particular stable state circuit
Reexamination Certificate

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Profile ID: LFUS-PAI-P-2846909

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