4. Boots, shoes, and leggings

Emmanuel L. Moise

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1-bit adder and multiplier containing a 1-bit adder

Boots – shoes – and leggings
Patent

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1000BASE-T packetized trellis coder

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Patent

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1000base-t packetized trellis coder

Excavating
Patent

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32-bit mode for a 64-bit ECC capable memory subsystem

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate

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Accumulator circuit and method of use thereof

Boots – shoes – and leggings
Patent

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Profile ID: LFUS-PAI-P-51615

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