Akio Kayanuma

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Bipolar transistor with reduced parasitic capacitance

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Method for manufacturing a semiconductor device

Adhesive bonding and miscellaneous chemical manufacture – Delaminating processes adapted for specified product – Delaminating in preparation for post processing recycling step
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Method for manufacturing a semiconductor device utilizing self-a

Metal treatment – Process of modifying or maintaining internal physical... – Chemical-heat removing or burning of metal
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Semiconductor device having at least one PN junction and channel

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Semiconductor device having enhanced impurity concentration prof

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Lateral bipolar transistor structure
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Profile ID: LFUS-PAI-P-1114112

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