4. Static information storage and retrieval
  5. Read/write circuit
  6. Having particular data buffer or latch

Adrian E. Ong

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Architecture and method for testing of an integrated circuit...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Bonding pads for testing of a semiconductor device

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate

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Bonding pads for testing of a semiconductor device

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate

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Burst EDO memory address counter

Static information storage and retrieval – Addressing – Byte or page addressing
Patent

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Chip testing within a multi-chip semiconductor package

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate

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Profile ID: LFUS-PAI-P-99173

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