Method of decreasing the K value in SiOC layer deposited by...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S622000, C438S624000, C438S763000, C438S780000, C438S781000, C438S787000, C438S788000, C438S789000

Reexamination Certificate

active

06627532

ABSTRACT:

BACKGROUND OF THE DISCLOSURE
1. Field of the Invention
The present invention relates to the fabrication of integrated circuits. More particularly, the invention relates to a process for depositing dielectric layers on a substrate and the structures formed by the dielectric layer.
2. Background of the Invention
One of the primary steps in the fabrication of modem semiconductor devices is the formation of metal and dielectric films on a substrate by chemical reaction of gases. Such deposition processes are referred to as chemical vapor deposition or CVD. Conventional thermal CVD processes supply reactive gases to the substrate surface where heat-induced chemical reactions take place to produce a desired film.
Semiconductor device geometries have dramatically decreased in size since such devices were first introduced several decades ago. Since then, integrated circuits have generally followed the two year/half-size rule (often called Moore's Law), which means that the number of devices that will fit on a chip doubles every two years. Today's fabrication plants are routinely producing devices having 0.35 &mgr;m and even 0.18 &mgr;m feature sizes, and tomorrow's plants soon will be producing devices having even smaller geometries.
In order to further reduce the size of devices on integrated circuits, it has become necessary to use conductive materials having low resistivity and insulators having low k (dielectric constant<4.0) to reduce the capacitive coupling between adjacent metal lines. One such low k material is spin-on glass, such as un-doped silicon glass (USG) or fluorine-doped silicon glass (FSG), which can be deposited as a gap fill layer in a semiconductor manufacturing process.
A liner/barrier layer is typically deposited between subsequently deposited conductive materials and the low k dielectric material to prevent diffusion of byproducts such as moisture onto the conductive materials. For example, moisture that can be generated during formation of a low k insulator readily diffuses to the surface of the conductive metal and increases the resistivity of the conductive metal surface. A barrier/liner layer formed from conventional silicon oxide or silicon nitride materials can block the diffusion of the byproducts. Similarly, a capping layer may be deposited on a low k dielectric gap film to prevent diffusion of contaminants such as moisture. However, the barrier/liner layers and capping layers typically have dielectric constants that are significantly greater than 4.0, and the high dielectric constants result in a combined insulator that does not significantly reduce the dielectric constant.
Therefore, there remains a need for dielectric layers having low dielectric constants and adjacent liner/barrier layers that provide an overall low dielectric constant.
SUMMARY OF THE INVENTION
The present invention generally provides a method for depositing a silicon oxycarbide layer having a low dielectric constant and depositing a silicon and carbon containing layer on the silicon oxycarbide layer. In one aspect, the invention provides a method for processing a substrate comprising depositing a dielectric layer comprising silicon, oxygen, and carbon on the substrate, wherein the dielectric layer has a carbon content of at least 1% by atomic weight and a dielectric constant of less than about 3, and depositing a silicon and carbon containing layer on the dielectric layer. The silicon and carbon containing layer can be an amorphous silicon carbide layer that may be doped with oxygen, nitrogen, or both.
Another aspect of the invention provides for a method for processing a substrate, comprising depositing a dielectric layer on the substrate by reacting an organosilane compound and an oxidizing gas, wherein the dielectric layer has a carbon content of at least 1% by atomic weight and a dielectric constant of less than about 3, and depositing a silicon carbide layer or doped silicon carbide layer on the dielectric layer at plasma conditions sufficient to reduce the dielectric constant of the dielectric layer.
In another aspect of the invention, a method is provided for processing a substrate, comprising depositing a dielectric layer on the substrate by reacting an organosilicon compound comprising three or more alkyl groups with ozone, wherein the dielectric layer has a carbon content between about 5% and about 50% by atomic weight and a dielectric constant less than about 3, and depositing a silicon carbide layer or doped silicon carbide layer on the dielectric layer by reacting an alkylsilane compound at plasma conditions sufficient to reduce the dielectric constant of the dielectric layer to less than about 2.4.
Another aspect of the invention provides for a substrate comprising a dielectric layer comprising silicon, oxygen, and carbon, wherein the dielectric layer has a carbon content of at least 1% by atomic weight, and a silicon and carbon containing layer capping the dielectric layer. The dielectric layer preferably has a dielectric constant less than about 2.4.


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Characterization and integration in Cu damascene structures of AURORA, an inorganic low-k dielectric; Donaton; et al.; Mat. Res. Soc. Symp. Proc. Vol 612 2000 Materials Research Society.

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