Sidewall spacer definition of gates

Details Sidewall spacer definition of gates Sidewall spacer definition of gates

2001-06-27

2003-03-04

Sherry, Michael (Department: 2829)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S696000

Reexamination Certificate

active

06528372

ABSTRACT:

FIELD OF THE INVENTION
This invention relates generally to the definition of sub-lithographic structures through the formation of sidewall spacers. In particular, this invention relates to sidewall spacer definition of sub-lithographic structures in semiconductor device fabrication.
BACKGROUND OF THE INVENTION
A continuing trend in semiconductor devices is the reduction of feature size to decrease the distance between components on devices and thus increase device speed and computational power. Photolithographic processes used for forming features have addressed the reduction in size and lowered the critical dimension (CD) attainable in a device, at least in part, through the use of ever decreasing wavelengths of electromagnetic radiation, i.e., light, to expose feature patterns on photoresist.
One important feature whose size is often determined by the CD in a semiconductor device is the gate. A typical gate fabrication process is shown in
FIGS. 1A-1D
. In
FIG. 1A
, gate oxide
110
is formed on a semiconductor substrate
100
between field oxide regions
102
. A gate material layer
112
, such as polycrystalline silicon, i.e., polysilicon, is formed on the gate oxide
110
and over the field oxide regions
102
.
In
FIG. 1B
, a photoresist mask
114
is formed on the gate material layer
112
. The photoresist mask
114
is formed by exposing a blanket photoresist layer to actuating radiation through a photomask with a pattern of the gate to be formed, and then developing the exposed photoresist.
In
FIG. 1C
, the gate
116
is formed by patterning the gate material layer
112
using the photoresist mask
114
as an etch mask. As shown in
FIG. 1D
, after the gate
116
is patterned by etching, the photoresist mask
114
is removed. Subsequently, further processing to complete the semiconductor device is performed.
FIG. 2
is a top view of the structure of
FIG. 1D
with completed gate
116
. The patterned gate material includes both the gate
116
and a wider region
118
of gate material for contacting to subsequent metallization, if desired.
SUMMARY OF THE INVENTION
According to an embodiment of the invention, there is provided a method for forming a small structure using spacers for definition of the structure. The method comprises a number of steps including: providing a sidewall template having a first sidewall region and a second sidewall region over a semiconductor substrate, forming a spacer layer comprising a spacer material over the sidewall template, performing a first etching of the spacer layer to remove a first region of the spacer layer over the first sidewall region while leaving a second region of the spacer layer over the second sidewall region, and performing a second etching of the spacer layer to form at least one sidewall spacer having a width, the at least one spacer adjacent the second sidewall region.
The first etching step may be performed, for example, using a break mask, where the exposed first region of the spacer layer is etched through the break mask.


REFERENCES:
patent: 5672531 (1997-09-01), Gardner et al.
patent: 5923982 (1999-07-01), Kadosh et al.
patent: 5936874 (1999-08-01), Clampitt et al.
patent: 6043562 (2000-03-01), Keeth

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