Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-11-14
2006-11-14
Thompson, A. M. (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C365S232000, C703S013000, C714S027000, C714S030000, C714S724000
Reexamination Certificate
active
07137085
ABSTRACT:
A system and method for wafer level global bitmap characterization include determining chip level defect data bitmaps from a semiconductor wafer, and consolidating the chip level defect data bitmaps into a global wafer level bitmap that characterizes substantially the entire wafer failure configuration. The global wafer level bitmap is then analyzed and compared with other global wafer level bitmaps to develop correlations thereamong and develop global wafer level bitmap definitions for conducting at least one of wafer-to-wafer, boat-to-boat, and lot-to-lot process analysis based upon the global wafer level bitmap definitions.
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Erhardt Jeffrey P.
Ho Siu May
Newbury David C.
Shetty Shivananda S.
Steffan Paul J.
Advanced Micro Devices , Inc.
Ishimaru Mikio
Lam Nelson
Thompson A. M.
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