Test apparatus

Details Test apparatus Test apparatus

2006-08-29

2006-08-29

Nghiem, Michael (Department: 2863)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C702S035000

Reexamination Certificate

active

07100099

ABSTRACT:
The semiconductor testing apparatus includes a data sampler for acquiring a plurality of clock cross-over test data samples from the DUT using data change point detection from the sample data value and a data change point storage section writing the DCP based on CLK1and reading the DCP based on CLK2and a clock sampler acquiring a plurality of clock sample values from the DUT and a clock change point detection section detecting a clock change point from the sample value and a clock change point storage section writing the clock change point based on CLKS and reading CCP based on CLKZ using a phase difference detection section detecting the phase difference between the data change point and the clock change point which are simultaneously read from the storage section with comparison to the phase difference with the specifications data and outputting the passed or failed display indication.

REFERENCES:
patent: 6479983 (2002-11-01), Ebiya
patent: 2001/0052097 (2001-12-01), Miura
patent: 2001-201532 (2001-07-01), None
patent: WO-03/060533 (2003-07-01), None
International Search Report issued for PCT/JP2004/010318 mailed on Nov. 2, 2004, 1 page.
Patent Abstracts of Japan, Publication No.: 2001-201532, Publication Date: Jul. 27, 2001, 2 pages.

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