VLSI fabrication processes for introducing pores into...

Details VLSI fabrication processes for introducing pores into... VLSI fabrication processes for introducing pores into...

2007-01-23

2007-01-23

Lebentritt, Michael (Department: 2812)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S781000, C438S780000, C257SE21576

Reexamination Certificate

active

11050621

ABSTRACT:
Porous dielectric layers are produced by introducing pores in pre-formed composite dielectric layers. The pores may be produced after the barrier material, the metal or other conductive material is deposited to form a metallization layer. In this manner, the conductive material is provided with a relatively smooth continuous surface on which to deposit.

REFERENCES:
patent: 4357451 (1982-11-01), McDaniel
patent: 4882008 (1989-11-01), Garza et al.
patent: 4885262 (1989-12-01), Ting et al.
patent: 5504042 (1996-04-01), Cho et al.
patent: 5686054 (1997-11-01), Barthel et al.
patent: 5700844 (1997-12-01), Hedrick et al.
patent: 5789027 (1998-08-01), Watkins et al.
patent: 5849640 (1998-12-01), Hsia et al.
patent: 5851715 (1998-12-01), Barthel et al.
patent: 5858457 (1999-01-01), Brinker et al.
patent: 5920790 (1999-07-01), Wetzel et al.
patent: 6140252 (2000-10-01), Cho et al.
patent: 6171661 (2001-01-01), Zheng et al.
patent: 6177329 (2001-01-01), Pang
patent: 6232658 (2001-05-01), Catabay et al.
patent: 6258735 (2001-07-01), Xia et al.
patent: 6268276 (2001-07-01), Chan et al.
patent: 6270846 (2001-08-01), Brinker et al.
patent: 6271273 (2001-08-01), You et al.
patent: 6312793 (2001-11-01), Grill et al.
patent: 6329017 (2001-12-01), Liu et al.
patent: 6329062 (2001-12-01), Gaynor
patent: 6340628 (2002-01-01), Van Cleemput et al.
patent: 6365266 (2002-04-01), MacDougall et al.
patent: 6383466 (2002-05-01), Domansky et al.
patent: 6383955 (2002-05-01), Matsuki et al.
patent: 6386466 (2002-05-01), Ozawa et al.
patent: 6387453 (2002-05-01), Brinker et al.
patent: 6391932 (2002-05-01), Gore et al.
patent: 6392017 (2002-05-01), Chandrashekar
patent: 6420441 (2002-07-01), Allen et al.
patent: 6444715 (2002-09-01), Mukherjee et al.
patent: 6455417 (2002-09-01), Bao et al.
patent: 6479374 (2002-11-01), Ioka et al.
patent: 6500770 (2002-12-01), Cheng et al.
patent: 6548113 (2003-04-01), Birnbaum et al.
patent: 6573030 (2003-06-01), Fairbairn et al.
patent: 6576345 (2003-06-01), Cleemput et al.
patent: 6596467 (2003-07-01), Gallagher et al.
patent: 6596654 (2003-07-01), Bayman et al.
patent: 6610362 (2003-08-01), Towle
patent: 6632478 (2003-10-01), Gaillard et al.
patent: 6667147 (2003-12-01), Gallagher et al.
patent: 6677251 (2004-01-01), Lu et al.
patent: 6715498 (2004-04-01), Humayun et al.
patent: 6753250 (2004-06-01), Hill et al.
patent: 6756085 (2004-06-01), Waldfried et al.
patent: 6797643 (2004-09-01), Rocha-Alvarez et al.
patent: 6805801 (2004-10-01), Humayun et al.
patent: 6812043 (2004-11-01), Bao et al.
patent: 6815373 (2004-11-01), Singh et al.
patent: 6831284 (2004-12-01), Demos et al.
patent: 6846380 (2005-01-01), Dickinson et al.
patent: 6848458 (2005-02-01), Shrinivasan et al.
patent: 6849549 (2005-02-01), Chiou et al.
patent: 6867086 (2005-03-01), Chen et al.
patent: 6903004 (2005-06-01), Spencer et al.
patent: 6914014 (2005-07-01), Li et al.
patent: 7018918 (2006-03-01), Kloster et al.
patent: 2002/0001973 (2002-01-01), Wu et al.
patent: 2002/0016085 (2002-02-01), Huang et al.
patent: 2002/0034626 (2002-03-01), Liu et al.
patent: 2002/0064341 (2002-05-01), Fauver et al.
patent: 2002/0106500 (2002-08-01), Albano et al.
patent: 2002/0123240 (2002-09-01), Gallagher et al.
patent: 2002/0141024 (2002-10-01), Retschke et al.
patent: 2002/0192980 (2002-12-01), Hogle et al.
patent: 2003/0064607 (2003-04-01), Leu et al.
patent: 2003/0119307 (2003-06-01), Bekiaris et al.
patent: 2003/0157248 (2003-08-01), Watkins et al.
patent: 2003/0198895 (2003-10-01), Toma et al.
patent: 2004/0069410 (2004-04-01), Moghadam et al.
patent: 2004/0096586 (2004-05-01), Schulberg et al.
patent: 2004/0096593 (2004-05-01), Lukas et al.
patent: 2004/0096672 (2004-05-01), Lukas et al.
patent: 2004/0099952 (2004-05-01), Goodner et al.
patent: 2004/0101633 (2004-05-01), Zheng et al.
patent: 2004/0102031 (2004-05-01), Kloster et al.
patent: 2004/0161532 (2004-08-01), Kloster et al.
patent: 2004/0170760 (2004-09-01), Meagley et al.
patent: 2004/0185679 (2004-09-01), Ott et al.
patent: 2005/0064698 (2005-03-01), Chang et al.
patent: WO95/07543 (1995-03-01), None
R.D. Miller et al., “Phase-Separated Inorganic-Organic Hybrids for Microelectronic Applications,” MRS Bulletin, Oct. 1997, pp. 44-48.
Jin et al., “Nanoporous Silica as an Ultralow-kDielectric,” MRS Bulletin, Oct. 1997, pp. 39-42.
Asoh et al., “Fabrication of Ideally Ordered Anodic Porous Alumina with 63 nm Hole Periodocity Using Sulfuric Acid,” J. Vac. Sci. Technol. B 19(2), Mar./Apr. 2001, pp. 569-572.
Asoh et al., “Conditions for Fabrication of Ideally Ordered Anodic Porous Alumina Using Pretextured AI,” Journal of the Electrochemica Society, 148 (4) B152-B156 (2001) pp. B152-B156.
Holland et al., “Nonlithographic Technique for the Production of Large Area High Density Gridded Field Sources,” J. Vac. Sci. Technol. B 17(2), Mar./Apr. 1999, pp. 580-582.
Masuda et al. “Highly Ordered Nanochannel-Array Architecture in Anodic Alumina,” App. Phys. Lett. 71(19), Nov. 1997, pp. 2770-2772.
Clube et al., White Paper from Holotronic Technologies SA; downloaded from www.hdotronic.com/whitepaper/fine-patt.pdf on Mar. 12, 2002.
Meli et al., “Self-Assembled Masks for the Transfer of Nanometer-Scale Patterns into Surfaces: Characterization by AFM and LFM”, Nano Letters, vol. 2, No. 2, 2002, 131-135.
“Shipley Claims Porous Low K Dielectric Breakthrough,” Press Release Mar. 17, 2003.
Jeffrey M. Calvert and Michael K. Gallagher, Semiconductor International, 26 (12), 56 (2003).
Van Bavel et al. , Future Fab International, 61, (2004).
Caluwaerts et al, “Post Patterning Meso Porosity Creation: A Potential Solution For Pore Sealing,” IITC 2003.
U.S. Office Action mailed May 31, 2006, from U.S. Appl. No. 10/941,502.
U.S. Office Action mailed May 30, 2006, from U.S. Appl. No. 10/785,235.
U.S. Office Action mailed May 31, 2006, from U.S. Appl. No. 10/849,568.
U.S. Office Action mailed Jun. 15, 2006, from U.S. Appl. No. 10/800,409.
Kelman et al., “Method for Reducing Stress in Porous Dielectric Films”, U.S. Appl. No. 11/369,311, filed Mar. 6, 2006.
U.S. Office Action mailed Jun. 28, 2006, from U.S. Appl. No. 10/825,888.
U.S. Office Action mailed May 2, 2006, from U.S. Appl. No. 10/295,965.
U.S. Office Action mailed Aug. 9, 2005, from U.S. Appl. No. 10/295,965.
U.S. Office Action mailed Jun. 14, 2006, from U.S. Appl. No. 10/789,103.
U.S. Office Action mailed Aug. 24, 2005, from U.S. Appl. No. 10/404,693.
U.S. Office Action mailed Sep. 1, 2005, from U.S. Appl. No. 10/672,305.
Cho et al., “Plasma Treatments of Molecularly Templated Nanoporous Silica Films,” Electrochemical and Solid-State Letters, 4 (4) G35-G38 (2001).
Yung et al., “Spin-on Mesoporous Silica Films with Ultralow Dielectric Constants, Ordered Pore Structures, and Hydrophobic Surfaces,” Adv. Mater. 2001, 13, No. 14, 1099-1102.
Schulberg et al., “System for Deposition of Mesoporous Materials,” U.S. Appl. No. 10/295,965, filed Nov. 15, 2002, 64 Pages.
Watkins et al., “Mesoporous Materials and Methods,” U.S. Appl. No. 10/301,013, filed Nov. 21, 2002, 34 Pages.
Justin F. Gaynor, “In-Situ Treatment of Low-K Films With a Silylating Agent After Exposure To Oxidizing Environments,” U.S. Appl. No. 10/056,926, filed Jan. 24, 2002, 34 Pages.
Humayun et al., “Method for Forming Porous Films By Porogen Removel Combined With In SITU Surface Modification”, Novellus Corporation, U.S. Appl. No. 10/404,693, filed Mar. 31, 2003, pp. 1-32.
Tipton et al., “Method Of Porogen Removal From Porous Low-K Films Using UV Radiation”, Novellus Systems, Inc., U.S. Appl. No. 10/672,311, filed Sep. 26, 2003, pp. 1-27.
Jan, C.H., et al,90NM Generation, 300mm Wafer Low k ILD/Cu Interconnect Technology,2003 IEEE Interconnect Technology Conference.
Wu et al., U.S. Appl. No. 10/789,103, entitled: Methods For Producing Low-K CDO Films With Low Residual Stress.
Wu et al., U.S. Appl. No. 10/820,525, entitled: Methods For

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