Using an extra boron implant to improve the NMOS reverse narrow

Details Using an extra boron implant to improve the NMOS reverse narrow Using an extra boron implant to improve the NMOS reverse narrow

1998-09-28

1999-09-28

Dang, Trung

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438223, 438433, 438525, 438524, H01L 2176

Patent

active

059602767

ABSTRACT:
A method to form, in a NMOS area, a shallow trench isolation (STI) having B doped sidewalls regions 44 to reduce the NMOS reverse narrow width effect in narrow active areas 12N (e.g., narrow channel regions <0.1 .mu.m wide). A substrate is provided having a NMOS area 13 and a PMOS area 15. A pad oxide layer 20 and a barrier layer 22 are formed on the substrate. Trenches 24 are etched in the substrate 10 in the NMOS and PMOS areas. The etching forms narrow active areas 12N and wide active areas 12W. The narrow active areas 12N have a width between 0.4 and 1.0 .mu.m. A liner layer 30 is grown on the sidewalls and bottom of the trench on the substrate. A first photoresist layer is formed covering the PMOS areas and having first opening over the NMOS areas. In a critical step, a large angle Boron implantation is performed into the sidewalls and the bottom of the trenches forming Boron doped regions 44 in the substrate. The first photoresist layer is removed. An insulating layer 50 is formed in the trenches in the NMOS and PMOS areas. PMOS field effect transistors in the PMOS areas and NMOS field effect transistors in the NMOS areas are formed. The invention's boron doped regions 44 reduce the reverse narrow wide effect in the NMOS areas.

REFERENCES:
patent: 5013673 (1991-05-01), Fuse
patent: 5047359 (1991-09-01), Nagatomo
patent: 5401998 (1995-03-01), Chui et al.
patent: 5851900 (1998-12-01), Chu et al.
Swolf, "Silicon Processing for the RLSI Era" vol. 3 Lattice Press, Sunset Beach, CA 1995, pp. 222-226.

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