Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-11-07
2006-11-07
Smith, Bradley K. (Department: 2891)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S270000, C257SE21540
Reexamination Certificate
active
07132333
ABSTRACT:
A transistor, memory cell array and method of manufacturing a transistor are disclosed. In one embodiment, the invention refers to a transistor, which is formed at least partially in a semiconductor substrate, comprising a first and a second source/drain regions, a channel region connecting said first and second source/drain regions, said channel region being disposed in said semiconductor substrate, and a gate electrode disposed along said channel region and being electrically isolated from said channel region, for controlling an electrical current flowing between said first and second source/drain regions, wherein said channel region comprises a fin-region in which the channel has the shape of a ridge, said ridge comprising a top side and two lateral sides in a cross section perpendicular to a line connecting said first and second source/drain regions, wherein said top side is disposed beneath a surface of said semiconductor substrate and said gate electrode is disposed along said top side and said two lateral sides.
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Gruening-Von Schwerin Ulrike
Schloesser Till
Weis Rolf
Dicke Billig & Czaja, PLLC
Infineon - Technologies AG
Smith Bradley K.
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