System for analyzing a failure in a semiconductor wafer by calcu

Details System for analyzing a failure in a semiconductor wafer by calcu System for analyzing a failure in a semiconductor wafer by calcu

1998-10-30

1999-12-28

De Cady, Albert

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

714799, 365200, G06F 1100

Patent

active

060095458

ABSTRACT:
Data containing defect position coordinates obtained based on the result of physical inspection of foreign material, a defect or the like at the surface of a semiconductor wafer by a defect inspecting apparatus is stored. Also stored is data of physical coordinates obtained based on fail bit data from a tester. Data indicating an additional failure region is produced by an additional failure region estimating apparatus based on the fail bit data, and is stored. Collation produces data of corrected physical position coordinates by adding the stored data of limitation by failure mode to the stored data of physical position coordinates, and collates the data of corrected physical position coordinates with stored data of defect position coordinates. Accordingly, accuracy in collation is improved, and failure can be analyzed even if caused not by a defect located at an address of the failure obtained by the fail bit data but by a defect relating to the defect located at the address of a failure.

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