Static random access memory

Details Static random access memory Static random access memory

1994-05-02

1995-04-18

Yoo, Do Hyun

Static information storage and retrieval

Read/write circuit

Precharge

36518901, 36518905, G11C 700

Patent

active

054084377

ABSTRACT:
The present invention relates to a static random access memory device, which has a precharge circuit for precharging bit lines to a predetermined voltage level in response to a precharge signal, a memory cell connected to a word line and bit lines for storing data, a word line selection address generating device for selecting the word line, a bit line selection address generating device for selecting the bit line, a read control circuit having a shaping circuit controlled by a read enable signal for shaping a level of the data, a latch device for latching the data of the bit line to keep a predetermined logic threshold voltage corresponding to the shaping means, and a write control circuit connected to the bit lines for supplying data to the memory cell. The latch device is provided in the read control circuit and includes NOR gates whose output signals are crossly applied. Each of the NOR gates receives data having the first logic state and data having the second logic state. The read control circuit thus latches data supplied from the bit lines, thereby accurately setting the logic threshold voltage of the inverter provided in the output terminal of the read control circuit. Accordingly, a stable operation can be performed even in low voltage and low frequency regions.

REFERENCES:
patent: 4829483 (1989-05-01), Ogimara
patent: 5202854 (1953-04-01), Koiue

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