Static information storage and retrieval – Read/write circuit – Precharge
Patent
1997-12-31
1999-03-23
Dinh, Son T.
Static information storage and retrieval
Read/write circuit
Precharge
36518525, G11C 700
Patent
active
058869379
ABSTRACT:
Disclosed is a NOR type mask ROM device with a hierarchical bit line architecture in which metal oxide semiconductor FETs constituting memory cells are connected in parallel to one another. The mask ROM device is implemented with an address transition detection (ATD) circuit, and comprises first and second bit lines arranged in the ratio of 2:1, ground lines corresponding to the second bit lines, respectively, first switches each connected between an end of a corresponding odd-numbered bit line of the first bit lines and an end of a corresponding bit line of the second bit lines, second switches each connected between an end of a corresponding even-numbered bit line of the second bit lines and an end of a corresponding ground line of the ground lines, and a charging circuit for charging at least one adjacent non-selected bit line of the first bit lines at both sides of at least one selected bit line of the first bit lines to a predetermined voltage level, when a precharging operation is carried out to sense data through at least one selected bit line of the second bit lines.
REFERENCES:
patent: 5414663 (1995-05-01), Komarek et al.
patent: 5416743 (1995-05-01), Allan et al.
patent: 5450361 (1995-09-01), Iwahashi et al.
patent: 5467300 (1995-11-01), Komarek et al.
patent: 5757709 (1998-05-01), Suminaga et al.
Dinh Son T.
Samsung Electronics Co,. Ltd.
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