Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2006-12-12
2006-12-12
Lamarre, Guy (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S025000
Reexamination Certificate
active
07149942
ABSTRACT:
A semiconductor integrated circuit has a scan path that includes, between the output of the first logic section and the input of the functional block, a parallel path and a serial shift path for serially transferring data, and that includes first selectors for connecting the output of the first logic section or the serial shift path to the input of the functional block, and flip-flops for storing the data. The semiconductor integrated circuit further includes second selectors connected into the serial shift path of the scan path, for connecting the output of the functional block or the serial shift path to the input of the second logic section. Test data is provided from the serial shift path of the scan path to the functional block via the second selectors, and data output from the functional block is output via the second selectors after switching the second selectors.
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Buchanan & Ingersoll & Rooney PC
Lamarre Guy
Renesas Technology Corp.
Trimmings John P.
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