Semiconductor integrated circuit with local monitor circuits

Details Semiconductor integrated circuit with local monitor circuits Semiconductor integrated circuit with local monitor circuits

2006-03-28

2006-03-28

Lamarre, Guy (Department: 2138)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

Reexamination Certificate

active

07020819

ABSTRACT:
A semiconductor integrated circuit includes a boundary scan register and a plurality of local monitor circuits. The local monitor circuits are arranged individually about peripheral circuit regions of a semiconductor integrated circuit, being spaced from the boundary scan register, in order to measure and predict operation speeds in accordance with local on-chip process variations at a plurality of locations on the peripheral circuit regions. The operational speed of the semiconductor integrated circuit is determined by taking correlations into account between an overall signal delay time measured by the boundary scan register and local signal delay times measured by the respective local monitor circuits.

REFERENCES:
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patent: 6032279 (2000-02-01), Ramamurthy et al.
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patent: 6075389 (2000-06-01), Umemoto et al.
patent: 6229368 (2001-05-01), Lee
patent: 6477115 (2002-11-01), Inoshita et al.

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