Semiconductor device and test method thereof

Details Semiconductor device and test method thereof Semiconductor device and test method thereof

2006-06-19

2009-06-23

Ton, David (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S731000

Reexamination Certificate

active

07552372

ABSTRACT:
An LSI has bidirectional buffers connected to a boundary scan circuit. The boundary scan circuit12has asynchronous setting circuits for setting each bidirectional buffer to input mode or output mode. The bidirectional buffers are asynchronously and uniformly set to output mode to detect a logic error. If there is no logic error, input/output terminals which are respectively connected to the bidirectional buffers are integrated and the bidirectional buffers are asynchronously and uniformly fixed to input mode. After setting a set value for setting a desired enable state to the boundary scan circuit, the uniform input mode is released asynchronously. Then, the boundary scan circuit implements DC test.

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patent: 6374380 (2002-04-01), Sim
patent: 6731106 (2004-05-01), Whetsel
patent: 2004/0199838 (2004-10-01), Rutkowski et al.
patent: 2005/0015689 (2005-01-01), Eppensteiner et al.
patent: 3072718 (2000-06-01), None
patent: 2003-337157 (2003-11-01), None

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