Selective deposition of amorphous silicon films on metal gates

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S446000, C438S448000, C438S649000, C438S721000, C438S744000, C257SE21165, C257SE21438, C257SE21507, C257SE21552, C257SE29127

Reexamination Certificate

active

07816218

ABSTRACT:
A microelectronic device includes a metal gate with a metal gate upper surface. The metal gate is disposed in an interlayer dielectric first layer. The interlayer dielectric first layer also has an upper surface that is coplanar with the metal gate upper surface. A dielectric etch stop layer is disposed on the metal gate upper surface but not on the interlayer dielectric first layer upper surface.

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