Process for patterning high-k dielectric material

Details Process for patterning high-k dielectric material Process for patterning high-k dielectric material

2006-12-12

2006-12-12

Toledo, Fernando L. (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S745000, C438S749000, C438S753000, C257SE21246

Reexamination Certificate

active

07148114

ABSTRACT:
A method of patterning a layer of high-k dielectric material is provided, which may be used in the fabrication of a semiconductor device. A first etch is performed on the high-k dielectric layer. A portion of the high-k dielectric layer being etched with the first etch remains after the first etch. A second etch of the high-k dielectric layer is performed to remove the remaining portion of the high-k dielectric layer. The second etch differs from the first etch. Preferably, the first etch is a dry etch process, and the second etch is a wet etch process. This method further includes a process of plasma ashing the remaining portion of the high-k dielectric layer after the first etch and before the second etch.

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Wolf, S. , “Silicon Processing for the VLSI Era,” vol. 4: Deep Submicron Process Technology, Lattice Press, Sunset Beach, CA, 2002, pp. 145-180.

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