Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2001-05-02
2003-01-07
Utech, Benjamin L. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S699000, C438S700000, C438S702000, C438S709000, C438S718000, C438S725000
Reexamination Certificate
active
06503840
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a process for forming integrated circuit structures. More particularly, this invention relates to a process for forming metal-filled openings in a layer of low dielectric constant (low k) dielectric material in an integrated circuit structure.
2. Description of the Related Art
The shrinking of integrated circuits has resulted in levels of electrically conductive interconnects being placed closer together vertically, as well as reduction of the horizontal spacing between the electrically conductive interconnects, such as metal lines, on any particular level of such interconnects. As a result, capacitance has increased between such conductive portions, resulting in loss of speed and increased cross-talk. One proposed approach to solving this problem of high capacitance is to replace the conventional silicon oxide (SiO
2
) dielectric material, having a dielectric constant (k) of about 4.0, with another insulation material having a lower dielectric constant to thereby lower the capacitance.
In an article by L. Peters, entitled “Pursuing the Perfect Low-K Dielectric”, published in Semiconductor International, Volume 21, No. 10, September 1998, at pages 64-74, a number of alternate dielectric materials are disclosed and discussed. Included in these dielectric materials is a description of a low k dielectric material having a dielectric constant of about 3.0 formed using a Flowfill chemical vapor deposition (CVD) process developed by Trikon Technologies of Newport, Gwent, U.K. The process is said to react methyl silane (CH
3
—SiH
3
) with hydrogen peroxide (H
2
O
2
) to form monosilicic acid which condenses on a cool wafer and is converted into an amorphous methyl-doped silicon oxide which is annealed at 400° C. to remove moisture. The article goes on to state that beyond methyl silane, studies show a possible k of 2.75 using dimethyl silane in the Flowfill process.
An article by S. McClatchie et al. entitled “Low Dielectric Constant Oxide Films Deposited Using CVD Techniques”, published in the 1998 Proceedings of the Fourth International Dielectrics For ULSI Multilevel Interconnection Conference (Dumic) held on Feb. 16-17, 1998 at Santa Clara, Calif., at pages 311-318, also describes the formation of methyl-doped silicon oxide by the low-k Flowfill process of reacting methyl silane with H
2
O
2
to achieve a dielectric constant of ~2.9.
The incorporation of such carbon-doped silicon oxide dielectric material into interconnect architecture has been very attractive not only because of the low k properties, but also because of the compatibility with conventional silicon process technologies. Generally these materials remain stable upon annealing at temperatures of up to 500° C. The carbon doped silicon oxide materials are characterized by the structure of amorphous silicon oxide with incorporated methyl groups and hydrogen species, and are also characterized by a reduced density in comparison with conventional silicon oxide that can be explained by the formation of microporosity surrounding the incorporated methyl groups. Furthermore, such hydrocarbon-modified silicon oxide dielectric materials deposited by CVD techniques are also characterized by strong adhesion.
However, when trenches and holes (such as vias and contact openings) are etched into dielectric films or layers, the resulting etched surfaces are exposed to atmospheric contaminants such as, for example, oxygen, nitrogen, rare gases, hydrocarbons, and water vapor which tend to be attracted to such surfaces. In the case of low dielectric constant (low k) materials, which tend to be porous in nature, the adsorption of such contaminants is greater. This is apparently due to a combination of effects including the stripping of weakly bound chemical radicals from the glass matrix that gave rise to the porosity. This is the case, for instance, in low k silicon oxide dielectric materials that achieved their low dielectric constant through the incorporation into the silicon oxide matrix of weakly bonded organic groups such as methyl groups, which effectively lowered the density of the low k dielectric silicon oxide material to achieve the desired low dielectric constant of the material.
Such organic groups are easily removed from the silicon oxide matrix during plasma etching and cleaning operations such as used, for example, to etch a hole such as a via in the low k dielectric material through a resist mask, and/or to remove the etch mask, and/or to remove etch residues formed either during etching of the hole or removal of the resist mask. If such newly modified surfaces are exposed to atmospheric contamination, e.g., moisture, there is a tendency for this contamination to replace the organic groups that have been removed (i.e., to fill the empty and/or attractive pores). When these now contaminated surfaces are subsequently put into another deposition system for the purpose of creating a thin diffusion barrier, the newly absorbed contaminants tend to diffuse out of the surface of the low k dielectric material, and interfere with the coating of this same surface by the diffusion barrier material. This causes the formation of porous barriers or otherwise defective barriers that do not exhibit normal barrier properties. For instance, in the case of tungsten plug technologies where a titanium film is first deposited by PVD to create a “glue layer”, followed by PVD formation of a TiN diffusion barrier prior to the deposition of the tungsten to fill the hole with a tungsten plug, breakdown of the TiN barrier is frequently observed, as evidenced by the reaction that occurs between the titanium film and the WF
6
gas which results in what is commonly referred to as “poisoned vias” or “poisoned plugs”.
Various approaches have been explored to attempt to solve this problem of via “poisoning”. Zukharev et al. U.S. Pat. No. 6,114,259, assigned to the assignee of this invention, and the subject matter of which is hereby incorporated by reference, teaches treating the etched via sidewalls of the low k carbon-doped silicon oxide dielectric material with a nitrogen plasma, or a nitrogen and oxygen plasma, to densify the exposed low k carbon-doped silicon oxide dielectric material. The Zukharev et al. patent further teaches removal of the photoresist mask used to form the openings with a mild oxidizing agent comprising an H
2
O plasma. The H
2
O plasma removes the resist mask without damaging the exposed low k carbon-doped silicon oxide dielectric material comprising the sidewalls of the etched via sufficiently to interfere with later filling of the via with an electrically conductive metal filler.
Wang et al. U.S. Pat. No. 6,028,015, also assigned to the assignee of this invention, and the subject matter of which is also hereby incorporated by reference, teaches treating damaged via sidewalls of low k carbon-doped silicon oxide dielectric material with either a hydrogen plasma or a nitrogen plasma to repair the via sidewall surfaces which have been damaged by prior removal of the photoresist mask with a traditional ashing/oxidation process, i.e., an oxygen plasma. Such a treatment with a hydrogen or nitrogen plasma is said to cause the hydrogen or nitrogen to bond to silicon atoms with dangling bonds left in the damaged surface of the low dielectric constant organo silicon oxide insulation layer to replace organo material severed from such silicon atoms at the damaged surface. Absorption of moisture in the damaged surface of the low dielectric constant organo silicon oxide insulation layer, by bonding of such silicon with moisture, is thereby inhibited.
John Hu U.S. patent application Ser. No. 09/428,344, also assigned to the assignee of this invention, and the subject matter of which is also hereby incorporated by reference, discloses a process for removing resist mask material from a protective barrier layer formed over a layer of low k silicon oxide dielectric material. The resist removal process comprises exposing the resist mask material to a hydrogen plasma for
Catabay Wilbur G.
Hsia Wei-Jen
Kim Yong-Bae
Kumar Kiran
Lu Hong-Qiang
LSI Logic Corporation
Taylor John P.
Tran Binh X.
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