Polycrystalline silicon layer with nano-grain structure and...

Semiconductor device manufacturing: process – Radiation or energy treatment modifying properties of... – By differential heating

Reexamination Certificate

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C438S795000, C257SE21517

Reexamination Certificate

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10707878

ABSTRACT:
A method of forming polycrystalline silicon with ultra-small grain sizes employs a differential heating of the upper and lower sides of the substrate of a CVD apparatus, in which the lower side of the substrate receives considerably more power than the upper side, preferable more than 75% of the power; and in which the substrate is maintained during deposition at a temperature more than 50° C. above the 550° C. crystallization temperature of silicon.

REFERENCES:
patent: 2002/0106841 (2002-08-01), Yamazaki et al.
patent: 2005/0146938 (2005-07-01), Forbes
patent: 2005/0266685 (2005-12-01), Nakano et al.
patent: 2006/0046383 (2006-03-01), Chen et al.
patent: 11-243188 (1999-09-01), None
patent: 2000-150882 (2000-05-01), None
patent: 2002-373944 (2002-12-01), None
patent: 2004-071653 (2004-03-01), None
Silicon Processing for the VLSI Era, S. Wolf and R. N. Tauber, Lattice Press, Sunset Beach CA, USA 1986—pp. 179-181.

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