Poly plug to reduce buried contact series resistance

Details Poly plug to reduce buried contact series resistance Poly plug to reduce buried contact series resistance

1997-04-18

1999-08-24

Whitehead, Jr., Carl

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257381, 257384, 257385, H01L 2976

Patent

active

059427850

ABSTRACT:
An integrated circuit device having a reduced buried contact resistance is achieved. A gate electrode lies on the surface of a semiconductor substrate. Source/drain regions within the semiconductor substrate surround the gate electrode. A polysilicon contact lies on the surface of the semiconductor substrate. A buried contact junction underlies the polysilicon contact and adjoins one of the source/drain regions. A doped polysilicon layer partially fills a trench in the semiconductor substrate at the junction between the buried contact junction and one of the source/drain regions wherein the doped polysilicon layer provides a conduction channel between the source/drain region and the adjoining buried contact junction.

REFERENCES:
patent: 5049518 (1991-09-01), Fuse et al.
patent: 5742088 (1998-04-01), Pan et al.

Affiliated with

Also associated with

Rating

Poly plug to reduce buried contact series resistance does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Poly plug to reduce buried contact series resistance, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Poly plug to reduce buried contact series resistance will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-469180