Synchronous semiconductor device, and inspection system and...

Details Synchronous semiconductor device, and inspection system and... Synchronous semiconductor device, and inspection system and...

2008-05-27

2008-05-27

Karlsen, Ernest (Department: 2829)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C365S201000, C714S718000

Reexamination Certificate

active

07378863

ABSTRACT:
The present invention provides a synchronous semiconductor device suitable for improving the efficiency of application of electrical stresses to the device, an inspection system and an inspection method thereof in order to efficiently carrying out a burn-in stress test. A command latch circuit having an access command input will output a low-level pulse in synchronism with an external clock. The pulse will pass through a NAND gate of test mode sequence circuit and a common NAND gate to output a low-level internal precharge signal, which will reset a word line activating signal from the control circuit. Simultaneously, an internal precharge signal passing through the NAND gate will be delayed by an internal timer a predetermined period of time to output through the NAND gate a low-level internal active signal, which will set a word line activating signal from the control circuit.

REFERENCES:
patent: 5394443 (1995-02-01), Byers et al.
patent: 5467468 (1995-11-01), Koshikawa
patent: 5627478 (1997-05-01), Habersetzer et al.
patent: 5727001 (1998-03-01), Loughmiller
patent: 5808961 (1998-09-01), Sawada
patent: 6061285 (2000-05-01), Tsukikawa
patent: 6489819 (2002-12-01), Kono et al.
patent: 6546503 (2003-04-01), Ooishi

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