Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2002-01-14
2003-12-02
Fahomy, Wael (Department: 2814)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S267000, C438S304000, C438S305000, C438S593000, C438S594000, C438S595000, C438S596000
Reexamination Certificate
active
06656796
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to methods for fabricating split gate field effect transistor (FET) devices, as employed within semiconductor integrated circuit microelectronic fabrications. More particularly, the present invention relates to methods for fabricating, with enhanced performance, split gate field effect transistor (FET) devices, as employed within semiconductor integrated circuit microelectronic fabrications.
2. Description of the Related Art
In addition to conventional semiconductor integrated circuit microelectronic fabrications having formed therein conventional field effect transistor (FET) devices and conventional bipolar junction transistor (BJT) devices whose transient operation provides for data storage and transduction capabilities within the conventional semiconductor integrated circuit microelectronic fabrications, there also exists within the art of semiconductor integrated circuit microelectronic fabrication non-volatile semiconductor integrated circuit microelectronic fabrications, and in particular non-volatile semiconductor integrated circuit microelectronic memory fabrications, such as but not limited to electrically erasable programable read only memory (EEPROM) non-volatile semiconductor integrated circuit microelectronic memory fabrications, whose data storage and transduction capabilities are not predicated upon transient operation.
Although non-volatile semiconductor integrated circuit microelectronic memory fabrications, such as but not limited to electrical erasable programmable read only memory (EEPROM) non-volatile semiconductor integrated circuit microelectronic memory fabrications, may be fabricated while employing any of several semiconductor integrated circuit microelectronic devices, a particularly common semiconductor integrated circuit microelectronic device employed within an electrically erasable programmable read only memory (EEPROM) non-volatile semiconductor integrated circuit microelectronic memory fabrication is a split gate field effect transistor (FET) device.
A split gate field effect transistor (FET) device is in part analogous in structure and operation with a conventional field effect transistor (FET) device insofar as a split gate field effect transistor (FET) device also comprises formed within a semiconductor substrate a channel region defined by a pair of source/drain regions also formed within the semiconductor substrate, wherein at least the channel region of the semiconductor substrate has formed thereupon a gate dielectric layer which separates a gate electrode from the channel region of the semiconductor substrate, but a split gate field effect transistor (FET) device is nonetheless distinguished from a conventional field effect transistor (FET) device by employing rather than a single gate electrode positioned upon the gate dielectric layer and completely covering the channel region of the semiconductor substrate: (1) a floating gate electrode positioned upon the gate dielectric layer (which in part serves as a tunneling dielectric layer) and covering over only a portion of the channel region defined by the pair of source/drain regions (such portion of the channel region also referred to as a floating gate electrode channel region); and (2) a control gate electrode positioned over the gate dielectric layer and covering a remainder portion of the channel region while at least partially covering and overlapping the floating gate electrode while being separated from the floating gate electrode by an inter-gate electrode dielectric layer (such remainder portion of the channel region also referred to as a control gate electrode channel region).
In order to effect operation of a split gate field effect transistor (FET) device, particular sets of voltages are applied to the control gate electrode, the source/drain regions and the semiconductor substrate in order to induce, reduce or sense charge within the floating gate electrode (which is otherwise fully electrically isolated) and thus provide conditions under which the floating gate electrode within the split gate field effect transistor (FET) device may be programmed, erased and/or read.
While split gate field effect transistor (FET) devices are thus desirable within the art of semiconductor integrated circuit microelectronic fabrication for providing semiconductor integrated circuit microelectronic fabrications with non-volatile data storage characteristics, split gate field effect transistor (FET) devices are nonetheless not entirely without problems in the art of semiconductor integrated circuit microelectronic fabrication.
In that regard, it is often difficult to efficiently form within non-volatile semiconductor integrated circuit microelectronic fabrications split gate field effect transistor (FET) devices with enhanced performance, such as in particular enhanced data erasure performance.
It is thus towards the goal of providing for use within semiconductor integrated circuit microelectronic fabrications, and in particular within semiconductor integrated circuit microelectronic memory fabrications, split gate field effect transistor (FET) devices with enhanced performance that the present invention is directed.
Various non-volatile semiconductor integrated circuit microelectronic devices having desirable properties, and methods for fabrication thereof, have been disclosed within the art of non-volatile semiconductor integrated circuit microelectronic fabrication.
Included among the non-volatile semiconductor integrated circuit microelectronic devices and methods for fabrication thereof, but not limited among the non-volatile semiconductor integrated circuit microelectronic devices and methods for fabrication thereof, are non-volatile semiconductor integrated circuit microelectronic devices and methods for fabrication thereof as disclosed within: (1) Woo et al., in U.S. Pat. No. 5,075,245 (a flash electrically programmable read only memory (EPROM) device with enhanced data erasure performance in part by forming the flash electrically programmable read only memory (EPROM) device with source and drain regions formed of asymmetric dimensions and beneath field oxide regions within the flash electrically programmable read only memory (EPROM) device); and (2) Lin et al., in U.S. Pat. No. 6,090,668 and U.S. Pat. No. 6,093,608 (a pair of split gate field effect transistor (FET) devices with enhanced data erasure performance by forming the pair of spilt gate field effect transistor (FET) devices with a pair of floating gates, each having a sharply pointed upper edge tip).
Desirable within the art of non-volatile semiconductor integrated circuit microelectronic fabrication, and in particular within the art of non-volatile semiconductor integrated circuit microelectronic memory fabrication, are additional methods and materials which may be employed for fabricating split gate field effect transistor (FET) devices with enhanced performance.
It is towards the foregoing object that the present invention is directed.
SUMMARY OF THE INVENTION
A first object of the present invention is to provide a method for fabricating a split gate field effect transistor (FET) device.
A second object of the present invention is to provide a method in accord with the first object of the present invention, wherein the split gate field effect transistor (FET) device is fabricated with enhanced performance.
A third object of the present invention is to provide a method in accord with the first object of the present invention and the second object of the present invention, wherein the method is readily commercially implemented.
In accord with the objects of the present invention, there is provided by the present invention a method for fabricating a split gate field effect transistor (FET) device.
To practice the method of the present invention, there is first provided a semiconductor substrate having formed thereupon a blanket tunneling dielectric layer, in turn having formed thereupon a blanket floating gate electrode material lay
Chan Bor-Wen
Hsu Chen-Yuan
Tao Hun-Jan
Wang Yu-I
Fahomy Wael
Rao Shrinivas H.
Taiwan Semiconductor Manufacturing Co. Ltd
Tung & Associates
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