Multi-metal-oxide high-K gate dielectrics

Details Multi-metal-oxide high-K gate dielectrics Multi-metal-oxide high-K gate dielectrics

2006-01-10

2010-11-02

Malsawma, Lex (Department: 2892)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S785000, C257SE21489

Reexamination Certificate

active

07824990

ABSTRACT:
A semiconductor structure having a high-k dielectric and its method of manufacture is provided. A method includes forming a first dielectric layer over the substrate, a metal layer over the first dielectric layer, and a second dielectric layer over the metal layer. A method further includes annealing the substrate in an oxidizing ambient until the three layers form a homogenous high-k dielectric layer. Forming the first and second dielectric layers comprises a non-plasma deposition process such atomic layer deposition (ALD), or chemical vapor deposition (CVD). A semiconductor device having a high-k dielectric comprises an amorphous high-k dielectric layer, wherein the amorphous high-k dielectric layer comprises a first oxidized metal and a second oxidized metal. The atomic ratios of all oxidized metals are substantially uniformly within the amorphous high-k dielectric layer.

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