Methods of forming integrated circuit devices having gate...

Details Methods of forming integrated circuit devices having gate... Methods of forming integrated circuit devices having gate...

2007-02-02

2009-06-02

Smith, Matthew (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S287000, C257SE21422, C257SE21423

Reexamination Certificate

active

07541243

ABSTRACT:
Methods of forming an integrated circuit device include forming first and second device isolation regions at side-by-side locations within a semiconductor substrate to thereby define a semiconductor active region therebetween. These first and second device isolation regions have sidewalls that extend vertically relative to the semiconductor active region. A first gate insulating layer is formed on a surface of the semiconductor active region. A central portion of the first gate insulating layer extending opposite the semiconductor active region is thinned to thereby define gate insulating residues extending adjacent sidewalls of the first and second device isolation regions. A second gate insulating layer is formed on the gate insulating residues to thereby yield a non-uniformly thick third gate insulating layer. A gate electrode is formed on the non-uniformly thick third gate insulating layer.

REFERENCES:
patent: 6579761 (2003-06-01), Hsieh
patent: 2003/0207520 (2003-11-01), Tseng
patent: 2000-0074388 (2000-12-01), None
patent: 2001-0053905 (2001-07-01), None
patent: 2001-0064598 (2001-07-01), None
patent: 1020050057788 (2005-06-01), None
patent: 1020060006556 (2006-01-01), None

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