Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-12-23
2000-11-21
Whitehead, Jr., Carl
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438239, 438381, 438386, 438692, H01L 218234, H01L 218244
Patent
active
061502065
ABSTRACT:
Methods of forming integrated circuit capacitors include the steps of forming a trench in a first electrically insulating layer and then forming a first electrically conductive layer on a sidewall and bottom of the trench. A dielectric layer is then formed on the first electrically conductive layer. Next, a second electrically conductive layer is formed on the dielectric layer, opposite the first electrically conductive layer. A step is then performed to planarize the first and second electrically conductive layers to define first and second electrodes of a capacitor in the trench. In particular, the step of planarizing the first electrically conductive layer comprises planarizing the first electrically conductive layer to define a first electrode having a U-shaped cross-section. This step results in the formation of a first electrode having a relatively large effective area (which is a function of the depth of the trench) for a given lateral dimension.
REFERENCES:
patent: 5275974 (1994-01-01), Ellul et al.
patent: 5629539 (1997-05-01), Aoki et al.
patent: 5674787 (1997-10-01), Zhao et al.
patent: 5879985 (1999-03-01), Gambino et al.
Guerrero Maria
Jr. Carl Whitehead
Samsung Electronics Co,. Ltd.
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