Methods of fabricating a semiconductor device having MOS...

Details Methods of fabricating a semiconductor device having MOS... Methods of fabricating a semiconductor device having MOS...

2006-08-01

2006-08-01

Smith, Bradley K. (Department: 2891)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S682000, C257SE21458

Reexamination Certificate

active

07084061

ABSTRACT:
Methods of fabricating a semiconductor device having a MOS transistor with a strained channel are provided. The method includes forming a MOS transistor at a portion of a semiconductor substrate. The MOS transistor is formed to have source/drain regions spaced apart from each other and a gate electrode located over a channel region between the source/drain regions. A stress layer is formed on the semiconductor substrate having the MOS transistor. The stress layer is then annealed to convert a physical stress of the stress layer into a tensile stress or increase a tensile stress of the stress layer.

REFERENCES:
patent: 5264724 (1993-11-01), Brown et al.
patent: 5683934 (1997-11-01), Candelaria
patent: 6071784 (2000-06-01), Mehta et al.
patent: 6265271 (2001-07-01), Thei et al.
patent: 6358806 (2002-03-01), Puchner
patent: 6656853 (2003-12-01), Ito
patent: 2004/0253776 (2004-12-01), Hoffmann et al.

Affiliated with

Also associated with

Rating

Methods of fabricating a semiconductor device having MOS... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Methods of fabricating a semiconductor device having MOS..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods of fabricating a semiconductor device having MOS... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3678110