Method of manufacturing low CTE substrates for use with...

Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates

Reexamination Certificate

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Details

C438S108000, C438S612000, C438S613000, C257SE21611, C257SE21503

Reexamination Certificate

active

07491624

ABSTRACT:
Disclosed are techniques that teach the replacement of the typical organic, plastic, or ceramic package substrate used in semiconductor package devices with a low-CTE package substrate. In one embodiment, a semiconductor device implementing the disclosed techniques is provided, where the device comprises an integrated circuit chip having at least one coupling component formed on an exterior surface thereof. Also, the device includes a package substrate having a mounting surface with bonding pads that are configured to receive the at least one coupling component. In such embodiments, the package substrate is selected or manufactured such that it has a coefficient of thermal expansion in a direction perpendicular to its mounting surface that is less than approximately twice a coefficient of thermal expansion along a plane parallel to its mounting surface.

REFERENCES:
patent: 6552267 (2003-04-01), Tsao et al.
patent: 2001/0020736 (2001-09-01), Nakazawa et al.
patent: 2005/0224973 (2005-10-01), Bernier et al.
patent: 2003213019 (2003-07-01), None
patent: 2004277671 (2004-10-01), None
patent: 2004359852 (2004-12-01), None

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