Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – By reaction with substrate
Reexamination Certificate
2009-07-21
2011-11-08
Ghyka, Alexander (Department: 2812)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
By reaction with substrate
C438S618000, C438S627000, C257SE21584
Reexamination Certificate
active
08053374
ABSTRACT:
In a method of manufacturing a metal wiring structure, a first metal wiring and a first barrier layer are formed on a substrate, and the first barrier layer is nitridated. An insulating interlayer is formed on the substrate so as to extend over the first metal wiring and the first barrier layer. Part of the insulating interlayer is removed to form a hole exposing at least part of the first metal wiring and part of the first barrier layer. A nitidation plasma treatment is performed on the exposed portion of the first barrier layer. A second barrier layer is formed along the bottom and sides of the hole. A plug is formed on the second barrier layer to fill the hole.
REFERENCES:
patent: 6159851 (2000-12-01), Chen et al.
patent: 2005/0245065 (2005-11-01), Motoyama
patent: 2000-235962 (2000-08-01), None
patent: 1020060041408 (2006-05-01), None
Choi Gil-Heyun
Choi Kyung-In
Lee Hyeon-Deok
Lee Jong-Myeong
Ghyka Alexander
Nikmanesh Seahvosh
Samsung Electronics Co,. Ltd.
Volentine & Whitt PLLC
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