Method of making high breakdown voltage twin well device with so

Details Method of making high breakdown voltage twin well device with so Method of making high breakdown voltage twin well device with so

1997-01-27

1999-06-15

Booth, Richard A.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438527, H01L 21336

Patent

active

059131225

ABSTRACT:
An FET semiconductor device comprises a doped silicon semiconductor substrate having surface. The substrate being doped with a first type of dopant. An N-well is formed within the surface of the P-substrate. A P-well is formed within the N-well forming a twin well. Field oxide regions are formed on the surface of the substrate located above borders between the wells and regions of the substrate surrounding the wells. A gate electrode structure is formed over the P-well between the field oxide regions. A source region and a drain region are formed in the surface of the substrate. The source region and the drain region are self-aligned with the gate electrode structure with the source region and the drain region being spaced away from the field oxide regions by a gap of greater than or equal to about 0.7 .mu.m.

REFERENCES:
patent: 4918510 (1990-04-01), Pfiester
patent: 5494843 (1996-02-01), Huang
patent: 5514889 (1996-05-01), Cho et al.
patent: 5712173 (1998-01-01), Liu et al.

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