Method of integrating high-K/metal gate in CMOS process flow

Details Method of integrating high-K/metal gate in CMOS process flow Method of integrating high-K/metal gate in CMOS process flow

2011-08-23

2011-08-23

Pham, Thanh V (Department: 2894)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

C438S142000, C438S199000, C438S275000, C438S287000, C257S369000, C257S407000

Reexamination Certificate

active

08003507

ABSTRACT:
The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a semiconductor substrate having a first active region and a second active region, forming a high-k dielectric layer over the semiconductor substrate, forming a first metal layer over the high-k dielectric layer, the first metal layer having a first work function, removing a portion of the first metal layer in the second active region, thereafter, forming a semiconductor layer over the first metal layer in the first active region and over the partially removed first metal layer in the second active region, forming a first gate stack in the first active region and a second gate stack in the second active region, removing the semiconductor layer from the first gate stack and from the second gate stack, and forming a second metal layer on the first metal layer in the first gate stack and on the partially removed first metal layer in the second gate stack, the second metal layer having a second work function.

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