Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2000-12-21
2002-11-05
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S240000, C438S003000, C438S396000, C257S306000, C257S310000
Reexamination Certificate
active
06475854
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a method, apparatus and article of manufacture for semiconductor processing.
2. Background of the Invention
Advancements in semiconductor manufacture have led to increases in the density and miniaturization of microelectronic devices. In general, as the integration of semiconductor devices such as a dynamic random access memory (DRAM) increases, the area available for the capacitor becomes more limited.
In order to obtain capacitors having a capacitance suitably large enough for a highly integrated device, new materials and structures for capacitors are being sought. One common capacitor structure includes a metal (M), insulator (I), silicon (S) stack, known as MIS, where the metal is a top electrode and the silicon is a bottom electrode. A typical insulator is Ta
2
O
5
because of its high dielectric constant. More recently, capacitor stacks comprise metal (M), insulator (I) and metal (M) layers. Such a scheme is known as an MIM stack wherein both electrodes are metals.
One problem with using a metal as the bottom electrode is the potential for its oxidation during its fabrication. It is believed that oxidation of the bottom electrode occurs during deposition of an oxygen-containing material such as Ta
2
O
5
and/or during an annealing step such as the annealing of Ta
2
O
5
. Oxidation of the bottom electrode changes the electrical properties of the capacitor and inhibits the ability of the capacitor to function properly. In particular, the dielectric constant of the insulator may be decreased, thereby detrimentally affecting the capacitance of the capacitor. The change in the dielectric constant of the insulator is believed to be due to migration of oxygen from the insulator to the metal electrode. The detrimental effects of oxidation of one or both of the electrodes can be quantified by the resulting high leakage currents and low breakdown voltages of the capacitors.
Therefore, there is a need for an improved capacitor structure and method for producing the same.
SUMMARY OF THE INVENTION
The present invention generally relates to a semiconductor device, and more particularly, to a capacitor structure of a semiconductor device and a method of manufacturing the same, which has a suitable capacitance for use in an integrated device.
According to one aspect of the invention, a semiconductor device comprises a bottom metal layer, an insulating layer, a top metal layer and conducting oxygen-containing layers at the interfaces of the metal layers and the insulating layer. In one embodiment, the top and bottom electrodes are made of ruthenium and the conducting oxygen-containing layer is ruthenium oxide.
In another aspect of the invention, a method for forming a device on a substrate is provided. In one embodiment, the method comprises forming a first metal layer on the substrate; forming a first conducting oxygen-containing layer on the first metal layer; forming an insulator on the first conducting oxygen-containing layer; forming a second conducting oxygen-containing layer on the insulator and forming a second metal layer on the second conducting oxygen-containing layer. In another embodiment the method comprises depositing a first ruthenium layer on a substrate; heating the substrate; contacting the first ruthenium layer with an oxygen-containing gas; depositing an insulating material thereafter; depositing a second ruthenium layer on the insulating material, contacting the second ruthenium layer with an oxygen-containing gas and then depositing a third metal layer.
REFERENCES:
patent: 5122923 (1992-06-01), Matsubara et al.
patent: 5335138 (1994-08-01), Sandhu et al.
patent: 5814852 (1998-09-01), Sandhu et al.
patent: 5834357 (1998-11-01), Kang
patent: 5838035 (1998-11-01), Ramesh
patent: 5851896 (1998-12-01), Summerfelt
patent: 5936831 (1999-08-01), Kola et al.
patent: 6078493 (2000-06-01), Kang
patent: 6090697 (2000-07-01), Xing et al.
patent: 6165834 (2000-12-01), Agarwal et al.
patent: 6235572 (2001-05-01), Kunitomo et al.
patent: 6255698 (2001-07-01), Gardner et al.
patent: 6271085 (2001-08-01), Yamamoto
patent: 6291290 (2001-09-01), Arita
patent: 6294425 (2001-09-01), Hideki
patent: 6303426 (2001-10-01), Alers
patent: 6355492 (2002-03-01), Tanaka et al.
patent: 2002/0022334 (2002-02-01), Yang et al.
Jin Xiaoliang
Narwankar Pravin K.
Nickles Annabel
Upadhyaya Deepak
Wang Yaxin
Applied Materials Inc.
Kennedy Jennifer M.
Moser Patterson & Sheridan LLP
Niebling John F.
LandOfFree
Method of forming metal electrodes does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of forming metal electrodes, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming metal electrodes will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2993661