Method of forming DRAM circuitry

Details Method of forming DRAM circuitry Method of forming DRAM circuitry

2002-09-13

2003-11-18

Nelms, David (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

Reexamination Certificate

active

06649466

ABSTRACT:

TECHNICAL FIELD
The invention relates to semiconductor processing methods, to methods of forming DRAM circuitry, to methods of depositing a tungsten comprising layer over a substrate, to methods of forming a transistor gate line over a substrate, to methods of forming a transistor gate line over a substrate, to methods of forming a patterned substantially crystalline Ta
2
O
5
comprising material, and to methods of forming a capacitor dielectric region comprising substantially crystalline Ta
2
O
5
comprising material.
BACKGROUND OF THE INVENTION
As DRAMs increase in memory cell density, there is a continuing challenge to maintain sufficiently high storage capacitance despite decreasing cell area. Additionally, there is a continuing goal to further decrease cell area. One principal way of increasing cell capacitance is through cell structure techniques. Such techniques include three-dimensional cell capacitors, such as trenched or stacked capacitors. Yet as feature size continues to become smaller and smaller, development of improved materials for cell dielectrics as well as the cell structure are important. The feature size of 256 Mb DRAMs and beyond will be on the order of 0.25 micron or less, and conventional dielectrics such as SiO
2
and Si
3
N
4
might not be suitable because of low dielectric constants.
Highly integrated memory devices are expected to require a very thin dielectric film for the 3-dimensional capacitor of cylindrically stacked or trench structures. To meet this requirement, the capacitor dielectric film thickness will be below 2.5 nm of SiO
2
equivalent thickness.
Insulating inorganic metal oxide materials (such as ferroelectric materials, perovskite materials and pentoxides) are commonly referred to as “high k” materials due to their high dielectric constants, which make them attractive as dielectric materials in capacitors, for example for high density DRAMs and non-volatile memories. Using such materials enables the creation of much smaller and simpler capacitor structures for a given stored charge requirement, enabling the packing density dictated by future circuit design. One such material is tantalum pentoxide.
Tungsten, in desired elemental or compound forms, is a conductive material finding increasing use in the fabrication of circuit devices. The semiconductor industry continues to search for new and hopefully improved ways of depositing or otherwise forming tungsten materials onto a substrate.
SUMMARY
The invention comprises semiconductor processing methods, methods of forming DRAM circuitry, methods of depositing a tungsten comprising layer over a substrate, methods of depositing an elemental tungsten comprising layer over a substrate, methods of depositing a tungsten nitride comprising layer over a substrate, methods of depositing a tungsten silicide comprising layer over a substrate, methods of forming a transistor gate line over a substrate, methods of forming a patterned substantially crystalline Ta
2
O
5
comprising material, and methods of forming a capacitor dielectric region comprising substantially crystalline Ta
2
O
5
comprising material. In one implementation, a semiconductor processing method includes forming a substantially amorphous Ta
2
O
5
comprising layer over a semiconductive substrate. The layer is exposed to WF
6
under conditions effective to etch substantially amorphous Ta
2
O
5
from the substrate. In one implementation, the layer is exposed to WF
6
under conditions effective to both etch substantially amorphous Ta
2
O
5
from the substrate and deposit a tungsten comprising layer over the substrate during the exposing. In one implementation, aspects of the invention are used to fabricate a transistor gate line. In one implementation, aspects of the invention are used to fabricate DRAM circuitry.


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