Method of forming a recess channel trench pattern, and...

Details Method of forming a recess channel trench pattern, and... Method of forming a recess channel trench pattern, and...

2007-04-17

2007-04-17

Menz, Doug (Department: 2891)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S259000, C438S271000, C257S330000

Reexamination Certificate

active

10917615

ABSTRACT:
A method of forming a recess channel trench pattern for forming a recess channel transistor is provided. A mask layer is formed on a semiconductor substrate, which is then patterned to expose an active region and a portion of an adjacent device isolating layer with an isolated hole type pattern. Using this mask layer the semiconductor substrate and the device isolating layer portion are selectively and anisotropically etched, thereby forming a recess channel trench with an isolated hole type pattern. The mask layer may be patterned to be a curved line type. In this case, the once linear portion is curved to allow the device isolating layer portion exposed by the patterned mask layer to be spaced apart from an adjacent active region. The semiconductor substrate and the device isolating layer portion are then etched, thereby forming a recess channel trench with a curved line type pattern.

REFERENCES:
patent: 6440794 (2002-08-01), Kim
patent: 2002/0094622 (2002-07-01), Sneelal et al.
patent: 10-70253 (1998-03-01), None
patent: 1999-74949 (1999-10-01), None
patent: 2002-50371 (2002-06-01), None
English language abstract of Korean Publication No. 2002-50371.
English language Abstract from Japanese Patent No. JP10-70253.
English language Abstract from Korean Patent No. KR1999-74949.

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