Method of forming a hole in the sub quarter micron range

Details Method of forming a hole in the sub quarter micron range Method of forming a hole in the sub quarter micron range

1998-11-09

2000-07-18

Booth, Richard

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438952, 438636, 438637, 438233, 438700, H01L 21336

Patent

active

06090674&

ABSTRACT:
Improved etching of sub-micron diameter via or contact holes in integrated circuits is achieved by first coating the dielectric layer through which the hole is to be etched with successive layers of titanium and silicon oxynitride. This is followed by coating with a conventional photoresist mask which is thinner than usual, thereby allowing for improved resolution. Etching is carried out in two stages. First, only the oxynitride and titanium layers are etched with minimal penetration into the dielectric. In this way a hard mask of titanium is formed. It's optical fidelity is excellent since the combination of silicon oxynitride and titanium act as a very efficient anti-reflection coating. Etching of the hole is then completed using a different etch which also removes the remaining photoresist, the silicon oxynitride as well as some of the titanium. Provided the thicknesses of the layers are within the ranges taught by the invention, a via/contact hole of uniform cross-section and, having the correct diameter, will be formed.

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