Etching a substrate: processes – Masking of a substrate using material resistant to an etchant – Mask is multilayer resist
Reexamination Certificate
2008-07-09
2011-10-04
Culbert, Roberts (Department: 1716)
Etching a substrate: processes
Masking of a substrate using material resistant to an etchant
Mask is multilayer resist
C216S041000, C216S046000, C438S689000
Reexamination Certificate
active
08029688
ABSTRACT:
For patterning during integrated circuit fabrication, a first pattern of first masking structures is formed, and a buffer layer is formed on exposed surfaces of the first masking structures. Also, a second pattern of second masking structures is formed in recesses between the buffer layer at sidewalls of the first masking structures. Furthermore, the first and masking structures are formed from spin-coating respective high carbon containing materials. Such first and second masking structures pattern a target layer with higher pitch than possible with traditional photolithography.
REFERENCES:
patent: 7312158 (2007-12-01), Miyagawa et al.
patent: 2006/0046484 (2006-03-01), Abatchev et al.
patent: 2006/0234166 (2006-10-01), Lee et al.
patent: 2007/0123037 (2007-05-01), Lee et al.
Cha Ji-Hoon
Jeon Kyung-Yub
Kim Myeong-Cheol
Yi Shi-Yong
Yoon Dong-Ki
Choi Monica H.
Culbert Roberts
Samsung Electronics Co,. Ltd.
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