Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-05-24
2005-05-24
Le, Dung A. (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S257000, C438S265000, C438S266000
Reexamination Certificate
active
06897115
ABSTRACT:
A method of fabricating a non-volatile memory device includes the steps of forming a lower conductive layer on a substrate, forming a lower and an upper sacrificial patterns on the substrate with the lower conductive layer, wherein the lower and upper sacrificial patterns include a trench exposing the lower conductive layer, forming mask spacers on sidewalls of the upper and lower sacrificial patterns, using the mask spacers and the upper sacrificial pattern as an etch mask, etching the exposed lower conductive layer to form a lower conductive pattern exposing the substrate, forming a plug conductive layer covering an entire surface of a substrate with the lower conductive pattern, and planarizingly etching the plug conductive layer until the lower sacrificial pattern is exposed, thereby forming a source plug in a gap region between the mask spacers that is connected to the substrate.
REFERENCES:
patent: 6593187 (2003-07-01), Hsieh
patent: 20020072170 (2002-06-01), Lam
patent: 03185737 (1991-08-01), None
English Abstract***.
Cho In-Soo
Jeon Byung-Goo
Lee Chang-Yup
You Jun-Yeoul
Yu Jae-Min
F. Chau & Associates LLC
Le Dung A.
Samsung Electronics Co,. Ltd.
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