Method of fabricating MOS transistor having epitaxial region

Details Method of fabricating MOS transistor having epitaxial region Method of fabricating MOS transistor having epitaxial region

2006-09-08

2009-11-03

Pham, Thanhha (Department: 2894)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S199000, C438S305000, C257SE21461, C257SE21459

Reexamination Certificate

active

07611951

ABSTRACT:
Example embodiments relate to a method of manufacturing a semiconductor device. Other example embodiments relate to a method of manufacturing a metal-oxide-semiconductor (MOS) transistor having an epitaxial region disposed in a lower portion of sidewalls of a gate pattern. Provided is a method of manufacturing a MOS transistor having an epitaxial region which improves an epitaxial growth rate and which may have fewer defects. The method of manufacturing a MOS transistor having an epitaxial region may include forming a gate pattern on a semiconductor substrate, forming a first ion implantation region having a first damage profile by implanting first impurity ions into the semiconductor substrate using the gate pattern as an ion implantation mask, forming a second ion implantation region having a second damage profile adjacent to the first damage profile by implanting second impurity ions into the semiconductor substrate using the gate pattern as an ion implantation mask and partially etching a lower portion of sidewalls of the gate pattern and forming in-situ an epitaxial region on the etched semiconductor substrate.

REFERENCES:
patent: 6852600 (2005-02-01), Wang et al.
patent: 2008/0029815 (2008-02-01), Chen et al.
patent: 10-2002-0013197 (2002-02-01), None
patent: 10-2004-0009752 (2004-01-01), None

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