Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-10-30
2010-10-05
Gurley, Lynne A (Department: 2811)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S268000, C257SE21410
Reexamination Certificate
active
07807526
ABSTRACT:
The present invention provides two-transistor silicon-oxide-nitride-oxide-semiconductor (2-Tr SONOS) non-volatile memory cells with randomly accessible storage locations as well as method of fabricating the same. In one embodiment, a 2-Tr SONOS cell is provided in which the select transistor is located with a trench structure having trench depth from 1 to 2 μm and the memory transistor is located on a surface of a semiconductor substrate adjoining the trench structure. In another embodiment, a 2-Tr SONOS memory cell is provided in which both the select transistor and the memory transistor are located within a trench structure having the depth mentioned above.
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Ho Herbert L.
Mandelman Jack A.
Ning Tak H.
Otani Yoichi
Abate Esq. Joseph P.
Gebremariam Samuel A
Gurley Lynne A
International Business Machines - Corporation
Scully , Scott, Murphy & Presser, P.C.
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