Method of fabricating a dual damascene interconnect structure

Details Method of fabricating a dual damascene interconnect structure Method of fabricating a dual damascene interconnect structure

2006-06-12

2008-08-19

Deo, Duy-Vu (Department: 1792)

Semiconductor device manufacturing: process

Chemical etching

Combined with coating step

C438S706000, C438S725000, C252S079100, C216S037000, C216S041000

Reexamination Certificate

active

07413990

ABSTRACT:
A method of fabricating an interconnect structure (e.g., dual damascene interconnect structure, and the like) of an integrated circuit device is disclosed. The interconnect structure is fabricated using a bi-layer mask comprising an imaging film and an organic planarizing film. The bi-layer mask is used to remove lithographic misalignment between a contact hole, a trench, and an underlying conductive line when the interconnect structure is formed. Additionally, a sacrificial layer may be used to protect an inter-metal dielectric (IMD) layer during subsequent planarization of the interconnect structure. The sacrificial layer may be formed of amorphous silicon (Si), titanium nitride (TiN), tungsten (W), and the like. The interconnect structure may be formed of a metal (e.g., copper (Cu), aluminum (Al), tantalum (Ti), tungsten (W), titanium (Ti), and the like) or a conductive compound (e.g., tantalum nitride (TaN), titanium nitride (TiN), tungsten nitride (WN), and the like).

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