Cleaning and liquid contact with solids – Processes – Including application of electrical radiant or wave energy...
Reexamination Certificate
2001-03-16
2003-07-01
Markoff, Alexander (Department: 1746)
Cleaning and liquid contact with solids
Processes
Including application of electrical radiant or wave energy...
C134S022180, C134S030000, C438S905000
Reexamination Certificate
active
06584987
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field of microelectronics fabrication. More specifically, the present invention relates to the forming of layers of microelectronics materials employing the method of high density plasma chemical vapor deposition.
2. Description of the Related Art
In the fabrication of microelectronics devices, there is considerable employment of layers of microelectronics materials sequentially formed and often thereafter patterned upon substrates. As microelectronics device dimensions have shrunk and microelectronics fabrications have increased in size and circuit density, the necessity for material layers to approach freedom from defects has placed great emphasis on ultra-clean methods and apparatus for fabrication of such layers.
A common method of formation of microelectronics layers is chemical vapor deposition (CVD), in which a reactive gas or gases are combined within a reactor vessel to form a solid layer deposited upon a substrate surface, with or without employing other sources of energy in addition to the chemical free energy of the reactants. When additional energy is supplied in the form of a high-density electrical plasma sustained in the reactive gases, the process is commonly referred to as a high density plasma chemical vapor deposition (HDP-CVD) process. In addition to forming a layer upon the desired substrate surface, the material formed by the chemical reaction also deposits on other interior surfaces of the reactor and associated apparatus. This residual material tends to build up as the number of deposition runs increases, and eventually must be removed or else problems may arise due to the surface deposit flaking off, releasing undesired substances into the reactor vessel during a deposition. Defects within the microelectronics fabrication and other undesirable consequences are liable to result.
The equipment employed within chemical vapor deposition processes may be cleaned by periodic disassembly and employing wet or dry cleaning methods upon the individual sub-components of the reactor system, but this results in significant down time and loss of production, increasing the cost of fabrication. More recently, dry etch cleaning has been introduced, in which the reactor system is kept in operation and periodically an etching gas is introduced which serves to clean the system in situ. This operation requires far less time and hence is less costly than wet or manual cleaning. Although dry etch cleaning of CVD systems is in general satisfactory, this method is also not without problems.
For example, the dry etching gas or gases must be carefully selected to avoid themselves or their products being the source of additional residual contamination. It is necessary to select dry etching gases which will not corrode or otherwise damage the apparatus. Also, the cost of the etching gas or gases may be a significant added factor if large quantities are needed.
It is thus towards the goal of providing a method for dry etch cleaning of CVD systems that the present invention is generally directed.
Various methods have been disclosed for the purpose of cleaning systems employed in chemical vapor deposition.
For example, Ye et al., in U.S. Pat. No. 5,756,400, disclose a method for plasma cleaning the interior surfaces of semiconductor processing chambers without chamber down time or significant loss of semiconductor wafer production. The method employs intermittent use of cleaning steps in a plasma reactor, employing a mixture of halogen-containing cleaning gases. The mixture of gases comprises one-half or more of a fluorine-containing gas and one-half or less of a chlorine-containing gas.
Further, Murugesh et al., in U.S. Pat. No. 5,811,356, disclose a method for reducing the mobile ion and metal contaminants in a semiconductor processing chamber. The method employs a fluorinated gas activated by RF power in the processing chamber in a cleaning step, followed by a seasoning step which forms over the cleaned interior surfaces a thin layer of the material to be subsequently deposited on wafers.
Still further, Shrotriya, in U.S. Pat. No. 5,843,239, disclose a method for removing particles from the interior of a processing chamber which improves the quality of the wafers subsequently produced in the chamber. The method employs a two-step cleaning process in which a first cleaning gas is introduced into the chamber to remove particles. A second cleaning gas is then introduced to remove a residue formed by the reaction of the first cleaning gas with the interior of the chamber.
Yet still further, Xi et al., in U.S. Pat. No. 5,849,092 and U. S. Pat. No. 5,926,743, disclose a method and an apparatus for removing particles and residues from a substrate processing system without over-etching the system. The method employs chlorine trifluoride as an etching gas, and the temperature of various parts of the system adjusted to control the cleaning rate and minimize over-etching of the cooler regions of the system.
Finally, Denison et al., in U.S. Pat. No. 5,911,833, disclose a method for cleaning a semiconductor wafer chuck in situ within a processing chamber while maintaining the system in a sealed condition and minimizing the time required for chuck cleaning. The method employs a cleaning gas and RF power introduced into the chamber containing the wafer chuck to perform the cleaning operation without disrupting the sealed condition of the chamber.
Desirable in the art of microelectronics fabrications are additional methods for cleaning reactor systems employed in chemical vapor deposition (CVD) with reduced cost and increased efficiency of cleaning.
It is towards this goal that the present invention is generally and more specifically directed.
SUMMARY OF THE INVENTION
A first object of the present invention is to provide a method for cleaning of residual material from a chemical vapor deposition apparatus in situ.
A second object of the present invention is to provide a method in accord with the first object of the present invention where the cleaning of a high density plasma chemical vapor deposition system is performed in situ employing a dry etching reaction to remove the residual material.
A third object of the present invention is to provide a method in accord with the first object of the present invention and the second object of the present invention where the method is readily commercially implemented.
In accord with the objects of the present invention, there is provided a method for dry etching of residual deposits in situ from a chemical vapor deposition (CVD) apparatus. To practice the invention, there is first employed a high density plasma chemical vapor deposition (HDP-CVD) apparatus to form layers of silicon oxide on substrates. After removal of substrates, the reactor is closed off. The interior of the reactor is then filled with a gas and a plasma formed, after which oxygen is added and the reactor allowed to bake to an increased temperature for a period of time. The power is then turned off and the reactor evacuated. There is then followed a normal cleaning step employing a reactive gas such as NF
3.
with greater cleaning efficiency due to the increased temperature caused by the bake step.
The present invention employs materials and methods which are known in the art of microelectronics fabrication, but in a novel order and sequence. The method of the present invention is therefore readily commercially implemented.
REFERENCES:
patent: 5620526 (1997-04-01), Watatani et al.
patent: 5756400 (1998-05-01), Ye et al.
patent: 5811356 (1998-09-01), Murugesh et al.
patent: 5843239 (1998-12-01), Shrotriya
patent: 5849092 (1998-12-01), Xi et al.
patent: 5861065 (1999-01-01), Johnson
patent: 5911833 (1999-06-01), Denison et al.
patent: 5926743 (1999-07-01), Xi et al.
patent: 6060397 (2000-05-01), Seamons et al.
patent: 6082375 (2000-07-01), Gealy et al.
patent: 6255222 (2001-07-01), Xia et al.
Cheng Wen-Kung
Cheng Yi-Lung
Tsan Chun-Ching
Wang Yin-Lang
Ackerman Stephen B.
Markoff Alexander
Saile George O.
Stanton Stephen G.
Taiwan Semiconductor Manufacturing Company
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