Method for fabricating interconnection and capacitors of a DRAM

Details Method for fabricating interconnection and capacitors of a DRAM Method for fabricating interconnection and capacitors of a DRAM

1998-06-03

2000-06-27

Nelms, David

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438239, 438253, 438 47, H01L 218242

Patent

active

060806206

ABSTRACT:
A method for fabricating a DRAM device having a simple geometry active area, self-aligned crown capacitors, and simultaneous formation of bit lines and polysilicon plugs is described. An active area of a semiconductor substrate is separated from other active areas by isolation regions. Gate electrodes and interconnection lines are formed on the substrate and isolation regions and associated source and drain regions are formed within the substrate. A silicon nitride layer is deposited overall to protect the isolation regions from etching and is then removed after openings to the substrate are etched through an insulating layer. Pillars of the insulating layer are left overlying the gate electrodes. A polysilicon layer is deposited to contact the exposed source and drain regions. A second silicon nitride layer is deposited overlying the polysilicon layer. The second silicon nitride layer and the polysilicon layer are etched away where they are not covered by a mask with an etch stop at the pillars to form a bit line whereby the polysilicon layer remaining between the pillars forms polysilicon landing plugs and wherein the polysilicon landing plug underlying the bit line forms a bit line contact. A second insulating layer is etched away where it is not covered by a mask to form contact openings to the polysilicon landing plugs on either side of the bit line. A crown-shaped capacitor is formed within the contact openings.

REFERENCES:
patent: 4944682 (1990-07-01), Cronin et al.
patent: 4966870 (1990-10-01), Barber et al.
patent: 5258096 (1993-11-01), Sandhu et al.
patent: 5466636 (1995-11-01), Cronin et al.
patent: 5491103 (1996-02-01), Ahn et al.
patent: 5679595 (1997-10-01), Chen et al.
patent: 5723373 (1998-03-01), Chang et al.
patent: 5930624 (1999-07-01), Murata et al.
patent: 5933724 (1999-08-01), Sekiguchi et al.

Affiliated with

Also associated with

Rating

Method for fabricating interconnection and capacitors of a DRAM does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for fabricating interconnection and capacitors of a DRAM , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating interconnection and capacitors of a DRAM will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1783753