Method for fabricating gate oxide layer

Details Method for fabricating gate oxide layer Method for fabricating gate oxide layer

1999-08-30

2001-04-24

Bowers, Charles (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S216000, C438S396000, C438S591000, C438S785000

Reexamination Certificate

active

06221712

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to a method for fabricating an integrated circuit (IC). More particularly, the present invention relates to a method for fabricating a gate oxide layer.
2. Description of Related Art
Currently, in the semiconductor process, the integration of the IC has become higher as the size of the field effect transistor (FET) becomes smaller. When the size of FET is smaller than 0.1 &mgr;m, the thickness of the gate oxide layer is smaller than 20 Å. However, the gate oxide layer is made from 6~7 layers of SiO
2
molecules equivalent to a thickness of about 20 Å. So, electrons may tunnel through the gate SiO
2
layer and cause leakage. Since the gate SiO
2
layer is thinner, it may be tunneled through by the dopant ions. Thus, this causes electrical problems for the device. As the size of the FET is usually limited by the thickness of the gate SiO
2
layer, many dielectrics having high dielectric constants are currently being developed to solve the problems introduced by the gate SiO
2
layer mentioned above. These dielectrics include Ta
2
O
5
, Pb(Zr, Ti)O
3
(i.e. PZT), and (Ba, Sr)TiO
3
(i.e. BST), wherein Ta
2
O
5
has a dielectric constant of about 20-25, the BST has a dielectric constant of about 20-60, and the PZT has a dielectric constant of about 600-1000.
Among the three types of dielectrics mentioned above, the process for Ta
2
O
5
is most compatible with the current process. As Ta
2
O
5
has to undergo recrystallization after its formation, in order to purify and strengthen its structure, the oxygen employed during the recrystallization may oxidize the silicon substrate to form a SiO
2
layer between the silicon substrate and the Ta
2
O
5
layer. Since the SiO
2
layer has a lower dielectric constant, the Ta
2
O
5
layer formed by the conventional method is only able to obtain a dielectric constant of about 15, instead of a basic value of 25. Thus, the Ta
2
O
5
layer formed by the conventional method cannot satisfy the need for further integration in future devices, and substitute dielectrics, such as BST and PZT which have high dielectric constants, should be used.
However, when BST and PZT are used as dielectric layers, current leakage problems may easily occur since these dielectrics have exceedingly high dielectric constants. So, many considerations have to be made for such processes. The compatibility problem of the whole process may also be encountered with BST and PZT serving as dielectric layers. Therefore, it is not easy to integrate the method mentioned above with the current process.
SUMMARY OF THE INVENTION
The invention provides a method for fabricating a gate dielectric layer. The method involves performing an organic metal chemical vapor deposition (OMCVD), with a Ta-based organic compound and a Ti-based organic compound serving as precursors, so that a Ta
2−x
Ti
x
O
5
dielectric layer is formed.
As embodied and broadly described herein, the invention provides a method for fabricating a gate structure. A substrate is provided, followed by forming a nitride region on a surface of the substrate. With a Tantalum (Ta)-based organic compound and a Titanium (Ti)-based organic compound serving as precursors, an organic metal chemical vapor deposition (OMCVD) is performed to form a Ta
2−x
Ti
x
O
5
dielectric layer on the substrate. A barrier layer, a conducting layer, and an anti-reflection layer are formed in sequence on the Ta
2−x
Ti
x
O
5
dielectric layer. Consequently, the anti-reflection layer, the conducting layer, the barrier layer, and the Ta
2−x
Ti
x
O
5
dielectric layer are patterned to form a gate structure on the substrate of the nitride region. The Ta-based organic compound may include a Ta alkoxide compound, whereas the Ti-based organic compound may include a Titanium alkoxide compound or a Titanium amino compound.
As the Ta
2−x
Ti
x
O
5
dielectric layer is formed by OMCVD, it has not only a higher dielectric constant but also better reliability. Furthermore, a stable and uniform phase without any phase transfer is maintained at the temperature involved in the subsequent process for the semiconductor device without any phase transfer. Thus, both the. property and the reliability of the device are maintained. In addition, the fabrication method of the Ta
2−x
Ti
x
O
5
dielectric layer is compatible with the conventional method for fabricating the Ta
2
O
5
dielectric layer, so that process integration is easily achievable with the method of the invention. As the Ta
2−x
Ti
x
O
5
dielectric layer is much thicker, the conventional problems such as the tunneling gate leakage and the penetration of the dopant ions, due to the thickness limitation of the gate SiO
2
layer, are solved.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.


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Wolf, Stanely, vol. 1, Silicon Processing for the VLSI Era, pp438-41, 1986.*
Wolf, Stanely, vol. 2, Silicon Processing for the VLSI Era, pp144-45, 1990.

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